M09500 - SEMI M95 - Test Method for Net Carrier Density and Resistivity of Silicon Epitaxial Layer by Capacitance-Voltage Measurements with an Evaporated Metal Schottky Diode StdTpc-Photolithography Metrology This Specification describes the volume

This Specification describes the volume within any process or cassette module which shall be accessible to the transport module end effector in a cluster tool

SEMI MF1153 — Test Method for Characterization of Metal-Oxide-Silicon (MOS) Structures by Capacitance-Voltage Measurements

where at least one is a device wafer

may be produced which are not applicable to the intended application use conditions

M09500 - SEMI M95 - Test Method for Net Carrier Density and Resistivity of Silicon Epitaxial Layer by Capacitance-Voltage Measurements with an Evaporated Metal Schottky Diode StdTpc-Photolithography Metrology This Specification describes the volume1 Purpose 1. 1 The net carrier density and the resistivity of silicon epitaxial layers are critical parameters in semiconductor device design. Controlling these values during the semiconductor device manufacturing process is essential in determining the devices performance through the margin of the semiconductor device design. 1. 2 This Test Method can be used for research and development, process control, as well as material specification,